Take a look at these two waveforms pulled from a UART line with a logic analyzer. Notice anything interesting?
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Posts tagged Debugging
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Seismic Sundays 3 – Debugging Woes
First, I have to admit that I messed up building the conditioning circuit. The first RC network after the first op-amp stage should have had a 6.8kΩ resistor. I accidentally used a 68kΩ resistor instead.
